The unannounced PS6 and the Xbox Helix console will have 40 and 56 Teraflops of GPU compute, respectively, according to a new rumor.
The figures were shared by known hardware insider KeplerL2 during a discussion on the NeoGAF forums, where they also offered additional comments about the next-generation console hardware. Responding to a question about whether the figures being discussed should be adjusted to account for architectural differences between generations, the insider mentioned that Teraflops should not be “normalized” between architectures.
Responding to a recent claim about the PS6 SoC’s support for parallel execution of Dual Issue instructions will double FP32 calculation and raise the theoretical peak performance of the chip from 40 to 68–80 Teraflops, the insider explained that the metric is fundamentally a measure of FMA (Fused Multiply-Add) throughput, meaning that comparing the raw figures directly is preferable to attempting to convert them based on architectural assumptions. They subsequently offered clarification on the Teraflops for both consoles when asked whether the claimed numbers are false, saying, “Yeah, it’s 40 for PS6 and 56 for [Xbox] Helix.” A difference of 16 Teraflops would give Microsoft’s next-gen console higher raw GPU compute capabilities than the PS5 successor.
However, Teraflops alone do not determine overall gaming performance. GPU architecture, clock speeds, memory bandwidth, cache configuration, ray-tracing capabilities, upscaling technology and other hardware and software features can all affect how a console performs in real-world games. As such, the provided numbers should not be interpreted as a direct indication of the performance differential between the two consoles.
Responding to a question regarding the possibility of a potential delay allowing Sony Interactive Entertainment to move its chip to a more efficient manufacturing process, the insider claimed that both console SoCs have already been “taped out.” This is an important milestone in semiconductor development indicating that the chip designs have progressed to the stage where physical manufacturing preparations can proceed.
